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rf5565a.exe PS/2 8555/8565 reference diskette v1.05
189-076 PS/2 Model 55 SX and 80387SX Math Co-Processor (8555-031 and 8550-061)
SHS15F2195 IBM PS/2 Model 55 SX HMS
Extract of 8555 from HMM
Reworking the DS1287 / DS1387 RTC chip
Early Planar Early 8555SX Planar
Peter wrote (edited): The "dead cockroach" board with the many patch wires and the glued, silver-capped patch chip. Needs the almost bare riser card, does not work with the later ones (or not always). Had various problems from which the non-functional pin to shut off the 386SX is the worst. Does not work with "clip-on" processor expansions. Fails with 8514/A + network cards. 8555 System Board FRU P/Ns
27F4667 Model 031 AND 061 (55SX). Bus Adapter, 55SXS FRU P/N 27F4666 Late 8555SX Planar 27F4667 / 57F1536
- the revised 55SX board FRU 27F4667. Components slightly
rearranged. Riser cards have more capacitors and / or the
74LS-something that fixes a problem with 8514/A-style
cards.
55LS "netcomputer" planar FRU 57F3003 / 84F6889  84F6897 BIOS Odd 84F6896 BIOS Even ZM64 (???) 63F7530 (???) >What is the unpopulated 28-pin DIP socket by the RTC? None of my 55 boards have it filled in. RIPL ROM if the network board didn't have it? Peter says: 24-pin - as you noted in your follow up posting. It is for a 2K CMOS Ram extension chip (6116 or
something) that adds to the one in the Dallas RTC -
needed for some purpose on totally medialess 55SXs (no
FDD, no HD, only NIC). I think it is intended to hold
some system status / shutdown infos that are usually
written to disk. William Walsh: >
Also has anybody ever seen the resisters soldered on top
the IMGS171S-35, it's labeled as ZM2 on Louis's page.
On this machine they have soldered 6
resistors in connecting some of the pins on that chip.
I'm wondering if this is a custom job or something
IBM did??
It's something IBM did. I don't know what the exact
purpose is, but it circumvents problems that IBM
experienced with the RAMDAC. Model 30-286 planars may also
have this fix. David Beem: They are diodes. Only present for some plastic versions of the RAMDAC. The ceramic version was fine. Riser Cards Early Riser P/N 27F4625 / 27F4630
This riser is bare of anything to the right of the MCA slots but the battery/speaker connector. Newer Riser FRU 64F3732, P/N 27F4625, 64F0774
This riser has an addition of a resistor, a 74F08, and a bit of wiring on the back. Late Riser FRU 27F4666, P/N 64F0808, 64F0809
The battery/speaker header is moved down and a few resistors and capacitors are added. 64F0809 takes care of hangs with the 8514/A card. Memory Supports 1 MB and 2 MB 100 ns and 85 ns SIMMs. Model 55 Tech Ref, 2nd Ed. claims 4 MB / 80 nS support. [55SX -041 / -081, 55LS -LE0 / -LT0]
DESCRIPTION FEATURE PART SYSTEM BOARD MEMORY NUMBER NUMBER PS/2 1 MB Memory Module Kit 85 ns 5212 6450603 PS/2 2 MB Memory Module Kit 85 ns 5213 6450604 PS/2 4 MB Memory Module Kit 80 ns 3933 87F9977 8555 -031 / -061 System BIOS Model 55SX
33F8145 / 33F8146 - 11/02/1988, sub-model '0C' (2x 27C512) Both identified as 33F8152/33F8153 internally. Model 55LS
84F6896 / 84F6897 - 02/08/1990, sub-model '1E' (2x 27C512) 8555 Diskette Drive Connector Not the same as in the HITR. Figure 3-5, page 3-8 of the Model 55 Tech Reference.
Some Type 2 serial controllers used on the Model 55 system board do not respond as described in the Hardware Interface Technical Reference. After the FIFO mode is enabled, bit 6 of the Interrupt Identification register is erroneously set to 0, indicating a Type 1 serial controller is installed. Any application program or operating system that uses bit 6 of the Interrupt Identification register as an indicator to determine FIFO support will default to the character mode. This indicator is ignored by the Model 55 ABIOS. Therefore, programs that operate through ABIOS can use the FIFO mode. The ABIOS routines also clear any error indications remaining after a mode change. Some application programs reset the received-data-ready indication by writing bit 0 of the Line Status register as a O. This method can cause compatibility problems and is not supported by Type 1 or Type 2 serial controllers. To avoid compatibility problems, bit 0 of the Line Status register can be reset to 0 by reading the data and discarding the data if it is not used. • The Model 55 supports FIFO through ABIOS calls only. Type 1 Parallel Port Controller (?) Bi-Directional, no DMA. > No, it doesn't get to the menu. It just says that the battery is dead then starts the Automatic Configuration (or, at least, attempts to). I tried unplugging everything and the plugging them one by one, but without any luck. It does the same thing every time... Peter says: Recently it may happen that the battery is *that* drained, that the CMOS cannot be properly written and the next reboot reads corrupted data and hangs the system. After a power cycle and reboot from the reference
diskette the silly game repeats. CMOS Clear Method Aron Eisenpress comes up with: "I have exactly the same problem with a 55SX.
Only in my case I was trying to install OS/2 on
it. The install progressed to the first reboot and
then couldn't boot off the drive. What's weird is
that it manages to copy all the files to the drive
during the installation, so it does see the drive, it
just won't boot from it. Aron suggested the following, but I haven't had a
chance to try it yet. I have to look for a DOS
floppy to boot from. If you try this and it works
please post it here. "I did some searching on the 55sx problem after
replacing the Dallas RTC chip, and found one suggestion
that says you need to clear the CMOS before the
configuration will take. The method is to boot from a floppy, run DEBUG, and
type o 70 13 Color Changes After Memory Upgrade I keep losing half my color settings in Windows whenever I increase the ram chips from 2 meg to four meg. Does anyone know what settings are being changed (INI files, resolution)? Any tips welcomed. Peter replies: I would suggest to try out a "bread board" installation. Remove the board from the chassis, remove the power-supply also and place it on a non-conductive surface (Warning: underside pins may scratch furniture). Install the memory modules, the riser board and lay HD and FDD in a place where it can be connected but do not touch board or power-supply. When the system runs fine without the chassis inspect the underside of the planar if there are cracks or too long component pins, especially on the riser-card connector and around all places, where the board fixing screws go. And: there are some combinations of planars / riser-cards known as non working. If the planar FRU is 27F4667 the appropriate riser-card must be 27F4666 (P/N 64F0809 on a white sticker, contains a 74F08-chip and some condensors / resistors. The almost totally empty riser-card (P/N 274630 on white sticker / 6 condensors between slots / 2 larger tinned areas at the rear) belongs to an early down-level 55SX-planar and is known to cause problems. The 2nd series risercard . Peter wrote: It is pretty hard to tell which boards are affected. I found out during testings, that mainly those old boards tend to fail that have the "dead cockroach" chip at the mid/front. It is sitting between the two bigger square chips and is accompanied by a silver capped chip glued to the board. Both are wired to the system with patch-wires. These machines have the old Level-1 riser card 27F4630 (printed on a decal), which is almost bare apart from six small condensors between the MCA connectors. The Level-1 riser board has no chips and no "component printing" in white. The board P/N is 33F5064 (sticker over 33F5060 P/N - which was the buggy, unfixed original board P/N). There was a revised systemboard without
the patch-on chip, which came with the Level-2 riser
(several resistors, some el-co's and the small
condensors - came with an ECA from IBM due to problems
running 8514/A style cards), which has been replaced by
the Level-3 riser 64F0809 with a 74F08 chip (ZM1). The
early 55SX planar cannot be used with the Level-3 risers
... the later systemboard should not be used with the
bare Level-1 riser. The later sysboard is FRU P/N 27F4667, P/N 85F0419 (55SX) or 57F3003 (55LS / LEO/LTO - which have the additional 2K CMOS NV-RAM), the riser is FRU P/N 27F4666, P/N 64F0809 (55SX) or 64F3732 (55LS). Sadly the FRU alone does not tell, which P/N is behind ... IBM always delivered the latest P/N at a FRU request. I installed about 350 - 400 Mod. 55SX in the early '90s for the german Automobile Club ..... so I guess I knew them quite well ... :-) The harddisk is in fact a camouflaged MCA-adapter with
a harddisk mechanism atop. The maximum system board memory capacity is 8MB (4MB
memory module kits installed in memory-module connector
1 and 2). A memory-module kit must be installed in
memory My experience is that the 55sx is fine with one SIMM,
but it must go in the slot closer to the power supply.
The 55sx takes PS/2 SIMMs, 1mb, 2mb, or 4mb, either 85ns
or 100ns. I'm pretty sure it can also take 80ns
SIMMs (definitely can in the 4mb size), but I'm not
certain. 486 CPU Upgrade: IBM PS/2
Model 56, 57 Older 55SX had a slightly buggy mainboard / CPU where the "CPU disable" pin did not work as supposed. You could use "clip-over" upgrades only on the 55SX anyway since it has no "upgrade" socket of any sort (the 387SX socket does not feed all required lines through ...). If your 55SX planar has the "dead cockroach" fix (silver capped chip with patchwires around) suspect it as one of the earlier ones that might or might not work. The early models with the "bare" riser card without any TTL-logic chip and without lots of capacitors had multiple troubles - not only with the CPU. >But could you ground out a pin directly on the cpu? Ahem ... as far as I recall IBM reported having got a quantity of 386SX where the disable pin does not work *at all* - and therefore any clip-over upgrades won't work. The "dealer confidential" paper I have in mind mentioned the 55SX / 65SX only - none of the other SX-machines (like L40, N33 etc.) where the case forbids to use any updates anyways. The L40 however had been on the "CPU upgradeable" list at Hantz & Partner (www.upgrade.de) years ago, which was a "send-in upgrade" with soldering on board level. So it seems as if only very early 16MHz 386SX were affected by this general fault. The corresponding pin is -FLOAT ("FLT#", active low - pin 28), which "floats all Intel 386SX bidirectional and output signals, including HDLA. Asserting FLD# isolates the Intel 386SX from the surrounding circuitry." (Intel Datasheet 24018708.PDF, Page 60) Originally this pin was added to allow in-circuit emulation without the need to unsolder / remove the chip from the board. Simple test: ground pin 28 and the system may not POST. If it does the chip is one of those faulty few. 386SX/16 CPUs in general do not have a (working) disable pin, except they bear a 'C STEP' writing (most of the ones I've seen don't...). All 386SX CPUs with 20 MHz or more use at least the C stepping mask, so that's not a issue for them... Best regards, Alfred Remove Password Password is gone. 305 ERROR CODE In The IBM PS2 Model 55SX From COMPUTERCRAFT ADF Sections for @DF9Fh "Integrated Fixed Disk and Controller"
DMA Arbitration Level |
