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Ed. This page was retrieved using the
Internet Archive. Tim O'Connor was and is the originator of these pages.
I found this page to be the only one I could find with this information collected.
I do not run a Cx486 family CPU, although I do have a 8573-P70 with a Cx486DRx2
in it. This page was HERE.
The Cyrix Cx486 family
The Cyrix Cx486DRx2 itself
L1 Cache
Good Cyrix control software for DOS, OS/2 & UNIX.
Better Cyrix Control software for OS/2 and DOS.
Improved results with 8570
Caveats & known problems
8580, Warp 3 & Cx486DRx2 20/40GP
Cx486DLC & FasMath Coprocessor problem
16 Mhz 8570 note
Evergreen processors?
Some additional links
A Final Word
The processor family
My Cx486DRx2 belongs to the Cyrix family of 386/486 hybrid CPUs, meant
primarily to offer increased 486 function to existing 386 systems. The family
includes:
Cyrix:
Cx486DLC Cx486SLC Cx486SLC/e
Cx486DLC2 Cx486SLC2 Cx486SLC/e-V
Cx486DRx Cx486SRx Cx486DRu
Cx486DRx2 Cx486SRx2 Cx486DRu2
Texas Instruments:
TI486DLC TI486SLC
Although the focus here is the Cx486DRx2, it does share logic with the
other members of this Cyrix DLC/SLC family and therefore the information
here *might* be of use to you if you have one of these other processors.
The differences between them can be found in the Chiplist,
chapter 2.30 and Chapter 2.31.
The main points are this: the SLC processors are 386SX (24-bit address bus)
replacements and are not to be confused with the IBM 486SLC, whereas the DLC/DR
processors are 80386DX replacements. The Texas Instrument processors listed
are similar to the Cx486DLC/SLC and are the result of a previous arangement
between the two companies.
Specifically on the Cx486DRx2
This is pin-compatible with i80386DX processors and uses the i80486 instruction
set. It was engineered to give i80486 function without being a slavish copy
of the Intel CPU: it is a product of Cyrix' own work. The average number of
clock cycles it takes for this processor to complete an instruction is 4,
which if I remember correctly would be the same number-of-cycles-per-instruction
needed by the i80386DX. It does not have a floating-point arithmetic unit
and thus floating-point math is carried out in software. It is a clock-doubled
version of the Cx486DRx, and comes in several clock rate varieties:
16/32 Mhz, 20/40 Mhz, 25/50Mhz and 33/66Mhz
. . .where the first speed is the motherboard speed and the second speed
is the processors internal clock speed. The 20/40 and the 25/50 have heat
sinks. The clock speed is (as far as I know) permanently enabled and niether
requires nor accepts any user intervention.
The L1 Cache
This processor gets a lot of its 'speed' from its 1KB L1 cache. Now here's
where this gets interesting. . . on many motherboards that aren't 'Cyrix
aware' this cache will be enabled on boot, but the entire 80386/80486 memory
address space (all 4GB of it) will be disabled, turning off the L1
cache for all intents & purposes.
Another issue that gets thrown into this are DMA events: when a device
request a direct memory access (like a disk drive) it would change and therefore
invalidate the current contents of the L1 cache. The processor has two options
available to validate the cache: either the FLUSH input or the BARB input.
FLUSH will occur after a DMA event 1) if the processor is instructed to use
this input to validate the cache or 2) if the planar is 'Cyrix-aware'. The
BARB input is used if FLUSH is not supported by the planar. If you use BARB
to validate the contents of the cache it entails more overhead, because the
instruction is executed at every memory refresh rather than merely after a
DMA event. If your motherboard doesn't support FLUSH, you have no other option
than to use the BARB input. Aparently, most 386 boards don't respect FLUSH.
So. . . we need to find the software that will 1) ascertain the state
of the cache, 2) change the cached area of memory if need be, and 3)determine
the cache validation method - BARB or FLUSH.
Some good Cyrix Control Software
After a bit of searching, I was able to find some Control software out
in the great wide world. BE AWARE THE FOLLOWING PROGRAMS ONLY APPLY TO
CX486DLC FAMILY CPUs. DON'T BE STUPID.
For DOS(Windows?) you can try Paul Gortmaker's
CYRIX100.ZIP This was written specifically for
the DLC/SLC processors, but applies to other 'family' members as well. There
are two versions of the CYRIX.EXE control program which are well-documented.
Now, since this was orignially *ix inspired, keep in mind that altough DOS
is case-insensitive, Gortmaker's CYRIX.EXE isn't. This program was a godsend
when I first discovered it. It can simply query the current state of the processor,
as well as provide cache control, and control over the DMA validation method.
Here's an alternate
download location for this archive at leo.org.
For OS/2, there's a device driver CYRIX.SYS that can be loaded in CONFIG.SYS. Unfortunately,
we don't know who to thank for this driver, as it's an amazing piece of work.
I loaded it right after TESTCFG.SYS, and had no problems with Warp 3. It automagically
selected the 'right answers' for my machine, BARB input for DMA validation,
and released all 4GB of 80386 memory space to be cached. Unfortunately, it
only operates as intended with Warp 3. With OS/2 2.1, the driver loads but
is not allowed by the OS to tinker with CPU control registers - CR0. You
can use the Gortmaker DOS utility above in conjunction with CYRIX.SYS to
query the processor state from within a VDM, but not to alter cache control/DMA
validation.
You can also download CYRIX.ZIP from the Norloff BBS: telnet://bbs.os2bbs.com
Now, for all you UNIX people out there.
. . you'll have to forgive me because I haven't tried any of this myself.
Don't really want to either, but that shouldn't stop you, right?:)
Approach A: If you're a Linuxed PS/2er, you might be able to get by without
any additional software by simply altering linux/arch/i386/setup.S in the
manner suggested by Linux readme for CX486DRx2.
It's the readme.3rd of a larger document which could be of further use to
you as well: http://www.go.dlr.de/fresh/linux/src/.warix/ps2scsi.tgz.html
Approach B: Linux control software: cyrix-1_00_tar.gz.
An alternate download source would also be at ibiblio.org.
Louis Ohland passed this on, knowing of a successful installation of this
control software for a CX486SRx2. The usage for the subject machine was:
/bin/cyrix -i2 -i3 -i4 -r -c -f -b -k- -e -xCC00,16 modprobe bogo.o
This produced 22.08 bogomips on the subject machine. Again, I'm pretty
dumb when it comes to *ix, So use your brain & Good Luck!.
Better Cyrix Control Software for OS/2 & DOS
Just when I thought CYRIX.SYS was the coolest thing since sliced bread
Tim Clarke sent me a copy of the original Cyrix software for CX486DRx and
CX486SRx that support DOS/Win and OS/2. He did this as a generous public
service, with no financial gain on his part. For my part, I hesitated about
publicly posting proprietary software. I tried to contact Via, the current
owner of the Cyrix name. Recieved no answer. None.
So, Via, if anybody there reads this: I take no profit here. This is your
software & I wouldn't claim otherwise. It runs the processor better than
anything else I've yet tried. The software was licensed with the sale of a
CPU and it stands to reason that since the only person that can make use of
this software is one who also has a Cyrix CX486DRx/CX486SRx CPU, they should
have recieved it with the processor. If a person has purchased a Cx486DRx/SRx
secondhand they should have the same computing ability as the orginal owner.
This isn't my preferred way of doing things - But y'all wouldn't answer my
e-mails!
So, here it goes, in LOADDSKF 1.44MB floppy format: CX486DRX.ZIP The archived programs support DOS (Win3.1)
and OS/2. CX486DRx & CX486SRx CPUs only.
Ed. The 3.30 version supports Dos/WfW/OS2/NT3.5:
Cx486DRx2.EXE
Now the good stuff - Cyrix' own programs do a much better job of controlling
the processor. The single largest thing which makes this possible is the
ability to enable the processor's pipeline, something all of the other control
software discussed here does not do. With the OS/2 version of the control
software the caching, pipeline, and DMA validation method can all be controlled
through a nifty WPS utility. Furthermore, it works on OS/2 2.1 and Warp 3
(and this time, I know this for a certainty). The machine performs as if
it were a slower 486SX. . . which, if you know Warp 3, you know is an entirely
tolerable existence.
For OS/2, the control software, CX486.EXE and FASTIO.EXE, are installed
by default in STARTUP.CMD; I had no difficulty moving the executables to
CONFIG.SYS in RUN statements because it makes my life simpler. The installation
program will create STARTUP.CMD if one doesn't yet exist.
Results
The text table below of Sysbench results should show you how the machine
has improved with different hardware - and different Cyrix control software.
The difference between 'Configuration I' and 'Configuration IV' has been
a very rewarding thing to experience. Why the cruddy FP-marks? No FPU:).
Sysbench 0.9.4e Condensed Results for 8570, OS/2 Warp 3. DIVE tests omitted.
Configuration I Configuration II
8514/A, XGA-2,
no CPU assist. no CPU assist
Machine name IBM 20Mhz 8570 IBM 20Mhz 8570
Processor Unknown Cyrix xMHz Unknown Cyrix xMHz
stepping 4.15.15 stepping 4.15.15
External cache 0KB 0KB
Graphics card IBM 8514/A - 1MB XGA-2 1MB
Coprocessor No No
Processors 1 1
RAM 14.24 MB 14.25 MB
Operating System data
OS/2 version 20.30 20.30
CSDLevel XR03001_ XR0W040_
FIXLevel Unknown XR0W040_
Revision number 8.200 8.264
Priority Dynamic Dynamic
Maxwait 3 3
Timeslice (32,32) (32,32)
Protectonly YES YES
Swap file size 11.00MB 16.00MB
...initially 6.00MB 16.00MB
Video data
Resolution 1024x768x8 bits/pix 640x480x8 bits/pixel
Bytes/scanline 0 640
Aperture size 0 307200
PM-Graphics-marks 11.695 11.455
CPU integer-marks 2.821 2.676
CPU FP-marks 0.000 0.000
File I/O marks 383.557 455.835
Memory marks 5.544 6.099
Simultaneous I/O 0.573 0.575
Disk I/O marks 4.558 4.595
Configuration III Configuration IV
CYRIX.SYS loaded CX486.EXE / FASTIO.EXE
(OS/2 and hardware configured same as II above)
PM-Graphics-marks 11.507 12.259
CPU integer-marks 3.090 7.228
CPU FP-marks 0.000 0.000
File I/O marks 425.559 443.580
Memory marks 5.450 12.198
Simultaneous I/O 0.575 0.575
Disk I/O marks 4.598 4.688
Known Problems
8580, Cx486DRx2 20/40GP, and Warp 3
Whether or not any driver is used, there is a warning out there for 8580
folks who use this processor. This was also from the Norloff BBS:
=======================================================================
PS/2 8580 with Cyrix Upgrade Locks Up during OS/2 Warp Installation
=======================================================================
Please Read Entire Document for Full Explanation of Procedures
--------------------------------------------------------------
DESCRIPTION
When the OS/2 Warp 3.0 Installation program prompts for Diskette 1, the
OS/2 logo appears with the message, "Loading Please Wait." The screen
then turns blank, the cursor goes to the top-left corner, and the
diskette-drive light stays on. The system appears to be locked up.
Pressing Ctrl+Alt+Del does not work. You must turn the system off.
The system is a PS/2 8580 with a Cyrix 486DX 20/40 MHz processor, 16 MB
of RAM, 4 MB on the system board, and two memory cards, one with 4 MB
and one with 8 MB. Both cards have 85-ns single in-line memory modules
(SIMMs).
RESOLUTION - This is a hardware problem.
1. Turn on the system, or press Ctrl+Alt+Del if it is already on.
2. When the small white box appears in the upper-left corner, press Alt+F2.
A list of the drivers that were loaded appears. OS2DASD.DMD was the
last driver loaded and installed. The cursor then went to the
upper-left corner and the system locked up.
3. Turn off the system; then remove the 4 MB and 8 MB cards.
4. Turn on the system and continue with the installation. With the 8 MB card
removed, the system can bypass the problem and complete the installation.
______________________________________________________________________
IBM disclaims all warranties, whether express or implied, including
without limitation, warranties of fitness and merchantability with
respect to the information in this document. By furnishing this
document, IBM grants no licenses to any related patents or copyrights.
Copyright (c) 1994, 1996 IBM Corporation. Any trademarks and product
or brand names referenced in this document are the property of their
respective owners. Consult your product manuals for complete trademark
information.
Cx486DLC & FasMath coprocessor problem
Aparently there is a known problem whereby an early Cx486DLC's will crash
a system with the one of the Cyrix FasMath Cx387+, Cx83D87, or EMC87 math
coprocessors. This is tied to sychronization problems with FSAVE & FSTOR
instructions. Later DLC's that have this problem fixed will have the letters
AB printed in the lower right hand corner.
Refer to Chiplist
Chapter 3.12.1 for details.
For all 16Mhz 8570's with the Cx486DRx2 16/32GP
You will definitely need 85 ns memory (which you should be using anyway,
right?) in order to cope with this CPU (so says the Chiplist).
Some additional links
If you've been reading this far, here might be some additional places of
interest.
- I've had exceptionally good luck with my 8570 and it's Cyrix upgrade
processor. Somebody else - with a 16Mhz 8570 - didn't. Their story is told
here:
http://www.colorado.edu/CNS/Digit/sepoct94/386.html
- On Fred Spencer's 8580 pages: CPU upgrade options for the 8580 PS/2.
Link HERE.
- I know I've cited him a bunch... he's simply a really good source.
Louis Ohland collected a bunch of info on
CPUs as well, such as the Blue Lightning upgrades.
- For those far, far brighter than me, there's Grzegorz Mazur's x86 site. He has a method for
for identifying CPUs by asking the processor directly, even the Cx486DLC family
processors: http://grafi.ii.pw.edu.pl/gbm/x86/cyrix.html.
Evergreen upgrade processors
What about my Evergreen processor which is based on a Cyrix core?.
Boy, I sure hate to disappoint folks. Fact is, I don't know much about these
processors, and I don't actually have one to play with here. I know information
on them is sketchy as well & requires a lot of digging. There are architectural
differences between some of the Evergreen 386-to-486 replacements based on
the TI486SXL2 - a much larger L1 cache, and (I gather) software control required
to activate clock-doubling.
Final word on Cx486DRx2
This has been the main driving force behind this site. I found information
on the Cx486DRx2 so widely scattered I felt I had to collect it all together
so that somebody else wouldn't have to go through the same hassle. And my
8570's the happier for it. 'Final Word' however, is a bit tongue-in-cheek:
I probably will never understand the full depth & breadth of this processor.
Yet I've tried to be as accurate & complete as possible here. If there
are inaccuracies, please let me know. Any further information on this processor
or one of its family will be appreciated. . . hopefully, I will be able
to add to this page and fill in some more gaps. For all you folks who've
done me a kindness by sending me Cyrix-related stuff- a very big thank you:).
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