Iomega PC4 Host Adapters

PC4, PC4A, PC4B, /50, /HD

@5FCB.ADF Iomega PC4B/HD SCSI Host Adapter Board
@7FF9.ADF IOMEGA PC4 Host Adapter Board
@7FFA.ADF Iomega PC4B/50 SCSI Host Adapter Board
5xxx - Direct Memory Access (DMA) Devices; 7xxx - Storage Devices

Iomega Software FTP (dead)

Iomega Drivers & Software
Iomega PC4
   ADF for PC4
Iomega PC4B/50
   ADF for PC4B/50
Iomega PC4B/HD (empty)
   ADF for PC4B/HD
Supported Devices
Using PC4B with a Fixed Disk
NCR 86C01 Snippets
Iomega Host Cable Pinouts

Thanks to Alex Perez for the PC4B/50 photos, ROM image, and other info.


Iomega Drivers & Software

IOMEGA turned over support for Bernoulli and Floptical products to Comet Enterprises.

OS2V234.EXE Iomega Tools for OS/2

Bernoulli drivers
ioware9xdrv.exe Win 95/98 ver. 1.0
iowarentdrv.exe Win NT 3.51/4.0 ver. 1.0
dosdrvr.exe Win 3.1 / DOS ver. 1.0

DOS, All 5 1/4 Bernoulli drivers
SCSI303.EXE
SCSI50.EXE Supports Zip, Jaz, Bernoulli and Lasersafe

8" drives, DOS, drivers ("Alpha")
OAD1-33.ZIP
rcddos.zip

Floptical?


Iomega PC4 "00683300-0" or "-1", FCC ID DDX7EBPC4 [P] [P] | [P] | [P] | [P]


J1 50-pin SCSI header
J2? DB37 Male connector
U5 NCR 53C90 609-3400382
U20-28 unpopulated parts (PALs and 74xx logic? Purpose unknown.)

The PC4 adapter is a full length, 8-bit adapter. The 16-bit portion of the edge connector is physically present (as required by the MCA spec.) but is only used to deliver power (+5 V and Ground).

No provision for a BIOS extension ROM.

The very few period articles say the PC4 does not do DMA but all known PC4 ADF files have a DMA level selection...

Silkscreen by barcode: "GEODUCK BY BC/MC/KM/RJ/SK" or "IOMEGA PC4 ADAPTER CARD"


ADF Sections 7FF9 - "IOMEGA PC4 Host Adapter Board"

I/O Address Select
   Use any one of the I/O Addresses listed
     <"240" [00240-0025F]>, 340 [00340-0035F], 400 [00400-0041F], 420 [00420-0043F], 3240 [03240-0325F], 8240 [08240-0825F], A240 [0A240-0A25F], "Disabled"
Note: "Disabled" makes the adapter inaccessible.

DMA Level Select
   The PC4 supports the DMA mode of data transfer. The lower the DMA level, the higher the priority. DMA level 5 is recommended.
     <"DMA Level 5">, 6, 7

Fairness
   'Fairness' enabled, the PC4 won't compete for the channel during the next arbitration phase if it is currently in control of the channel. Other installed adapters can obtain the channel in the next sequence based on each adapter's assigned priority level.
   'Fairness' disabled, the adapter competes for every arbitration phase and obtains more than its fair share of channel usage. Recommend 'Fairness Enabled' for all adapters.
     <"Fairness Enabled">, "Fairness Disabled"

Preempt Count Select
   When the PC4 detects that another adapter requires use of the channel, the Preempt Count feature is activated. The Preempt Count is the maximum number of bytes to transfer before yielding control of the channel. The PC4 always transfers a max of 7 bytes before relinquishing control of the channel. NOTE: Always ON, it appears...
     <"7 Bytes">
Note: The little bit we have on the NCR 8601 has four settings, 0, 1, 3, and 7.


Iomega PC4B/50 & 50F ASSY 01046200 [P] [P] | [P] [P] [P] | [P] | [P]

J1 50-pin SCSI header
J2 DB37 Male connector
J5 TERMPWR jumper
RP1-3 Term. resistor paks
U1 BIOS ROM 27C64A-25
U2 8Kx8 SRAM
U6 NCR 86C01 MCA Interface
U7 NCR 01148000
U15 16.000 MHz osc

U2 8Kx8 SRAM - Sony CXK5864BM-12L, UMC UM6264M-12, NCR 26C64L-10, or compatible.

Bar code label area: "SK/KMI/JH". "JH" like Jack Hoa from Future Domain?

IOMEGA identifies the card quite well on the sticker:
01046201-03 [P/N]
PC4B/50 10-02-90 [Model, Date]
S/N 4EC2HY [S/N]

HERE you can see a PC4B card that has a plastic extension riveted on to the PCB. This turns it to a full-length adapter. Possibly to aid air flow?

PC4A vs. PC4B

Some components have an outline around them marked as PC4A or PC4B - indicating that they should be populated only on the respective variant of the adapter. It seems that the 3 PALs and 5 TTL marked as PC4B are supposed to be replaced with a set of (0-ohm?) resistors on the PC4A. The current theory (supported by the snippet below) is that the "B" variant is bootable, while the "A" is not. The "A" boards appear to be much less common - if you have one, please Contact Us. It should be possible to "downgrade" a PC4B adapter by removing the "B" marked logic and installing the "A" marked resistors (for no real reason, short of proving or disproving this theory). The ROM can be easily disabled from System Configuration.

M. Brutman said (original HERE):
   I am using an Iomega PC2B controller which is an 8 bit controller card that works in the IBM PC, XT or AT. The "B" in the model number indicates that this card has a BIOS extension that allows the machine to boot from the Bernoulli Box if a properly prepared cartridge is loaded.

Adapter ROM

Uses 27C64A-25 8Kx8 DIP-28 EPROM.

01050501 - PC4B50 ver. 6.21, checksum 8900 (PC4B50F) (thx to Alex Perez)
01050501 - PC4 ver. 7.02 (H/A), checksum 5500 (PC4B/50)
01521203 - PC4 Level-11 (H/A), checksum 5800 (PC4B50F)


ADF Sections 7FFA - Iomega PC4B/50 SCSI Host Adapter Board

I/O Address Select
   I/O address used by PC4B/50
     <"240" (io 00240h-0025Fh)>, 340 (0340-035F), 400 (0400-041F), 420 (0420-043F), 3240 (3240-325F), 8240 (8240-825F), A240 (A240-A25F), Disabled
Note: "Disabled" makes the adapter inaccessible.

DMA Level Select
   The PC4 supports the DMA mode of data transfer. Most operating systems require this option to be enabled. The lower the DMA level, the higher the priority.
     <"DMA Level 5">, 6, 7, DMA Disabled

Fairness
   If 'Fairness' is enabled, the PC4 adapter will not compete for the channel during the next arbitration phase if it is currently in control of the channel. This allows other installed adapters to obtain the channel in the next sequence based on each adapter's assigned priority level. When 'Fairness' is disabled, the adapter will compete for every arbitration phase and will obtain more than its fair share of channel usage.
     <"Fairness Enabled">, Fairness Disabled

IRQ level
   Operation with multi-tasking operating systems may require the use of an IRQ signal when the PC4 requires processor service. No other adapter may be assigned the same IRQ level as the PC4. For DOS-only systems, this option may be disabled.
     <"IRQ 7">, 5, 3, 9, IRQ Disabled

Memory Address Select
   You may set the PC4 adapter to any one of the Memory Addresses listed. The first choice is recommended for systems with a fixed disk installed.
     < "Disabled">, D400 (d400-d5ff), D200 (d200-d3ff), D000 (d000-d1ff), CE00 (ce00-cfff), CC00 (cc00-cdff), CA00 (ca00-cbff), C800 (c800-c9ff)
Note: Uses the clone 0,1 for boot devices!
Note: "Disabled" disables the BIOS ROM. Same as pulling the BIOS EPROM.


Iomega PC4B/HD

No info available.

Please Contact Us if you have this adapter or any other variant not documented here.


ADF Sections 5FCB - "Iomega PC4B/HD SCSI Host Adapter Board"

I/O Address Select
  Set the adapter to any of the I/O Addresses. The first choice is recommended. 'Disabled' causes the adapter to be inaccessible.
     <"240">, 340, 400, 420, 3240, 8240, A240, Disabled

DMA Level Select
   The PC4 supports DMA mode of data transfer. Most O/Ss require this to be enabled. The lower the DMA level, the higher the priority. If you have a hard disk installed, it is recommended that you select a DMA level higher than the hard disk.
     <"DMA Level 7">, 6, 5, DMA Disabled

Fairness
   "If 'Fairness' is enabled, the PC4 adapter will not compete for the channel during the next arbitration phase if it is currently in control of the channel. This allows other installed adapters to obtain the channel in the next sequence based on each adapter's assigned priority level. When 'Fairness' is disabled, the adapter will compete for every arbitration phase and will obtain more than its fair share of channel usage. We recommend you use 'Fairness Enabled' for all adapters.
     <"Fairness Enabled">, Fairness Disabled

IRQ level
   Operation with multi-tasking operating systems may require an IRQ when the PC4 requires processor service. No other adapter may be assigned the same IRQ level as the PC4. For DOS-only systems, this option may be disabled.
     <IRQ 3>, 5, 7, 9, or Disabled.

Memory Address Select
   The PC4 may use any of the Addresses listed. "Disabled" is recommended for systems with a fixed disk installed. If you want to boot from a device connected to your PC4, select the first available memory address and assign the device attached to the adapter the SCSI ID of zero.
     <"Disabled">, DC00, D800, D400, D000, CC00, C800
Note: Uses the clone 0,1 for boot devices!
Note: "Disabled" disables the BIOS ROM. Same as pulling the BIOS EPROM.

Termination Select
   Sets termination ON or OFF. Default is ON. Turn termination OFF if you intend to use both the internal and external connectors.
     <"ON">, OFF


Supported Devices

The PC4 Micro Channel interface controller supports the following Iomega drive subsystems:

  • MultiDisk 150 (B150)
  • Bernoulli 20, 44, 90, 230
  • Floptical 21
  • LaserSafe, LaserSafe PRO

The PC4 interface controller is an Iomega proprietary controller, not a SCSI controller. The PC4B will not support third party SCSI devices. The PC4B interface kit includes the 37 to 50 pin SCSI cable, OAD for DOS drivers, and Utility Users Manual. The PC4B controller may also be use with the OS/2, Unix, and Xenix operating systems. Addition drivers will be needed for any operating system other than DOS.

IBM Models 90 and 95 must have a hard drive installed before the PC4B controller will function.

If your computer has a fixed disk drive, the fixed disk drive should be used to boot your computer. The ROM on the Iomega PC4B adapter should be disabled (more info below).


Using PC4B with a Fixed Disk

If your Micro Channel computer has a fixed disk, you must make sure that the ROM on the PC4B host adapter is disabled. Make sure that your Iomega subsystem is NOT on and then boot your computer using the Reference Disk. Use the "Change configuration" utility to check the ROM setting for the host adapter. If the ROM is not disabled, select "Disabled" from the ROM address options. After the ROM has been disabled check the "Set features" menu for a "Set startup sequence" option. If such an option exists, select it and make sure the fixed disk is listed in the startup sequence.


NCR 86C01 Snippets (complete thread "An MCA ESP driver" HERE)

Michal Necasek pulled this out while traveling...

OK, here's the goods I promised. The NCR 86C01 is an MCA interface chip that handles enabling/disabling IRQ, DMA interfacing, I/O port selection and other fun stuff. It takes up 16 addresses, and the chip it is connected to gets the following 16. Registers are as follows:

Offsets 0-1 : Card ID

Offset 2 : Mode enable register
             Bit    7 : Data Word width (1 = 16, 0 = 8)
             Bit    6 : IRQ enable (1 = enabled)
             Bits 5,4 : IRQ select
                        0  0 : IRQ 3
                        0  1 : IRQ 5
                        1  0 : IRQ 7
                        1  1 : IRQ 9
             Bits 3-1 : Base Address
                        0  0  0 : <disabled>
                        0  0  1 : 0x0240
                        0  1  0 : 0x0340
                        0  1  1 : 0x0400
                        1  0  0 : 0x0420
                        1  0  1 : 0x3240
                        1  1  0 : 0x8240
                        1  1  1 : 0xA240
             Bit    0 : Card enable (1 = enabled)

Offset 3 : DMA control register
             Bit    7 : DMA enable (1 = enabled)
             Bits 6,5 : Preempt Count Select (transfers to complete after
                       86C01 has been preempted on MCA bus)
                        0  0 : 0
                        0  1 : 1
                        1  0 : 3
                        1  1 : 7
             Bit    4 : Fairness enable (1 = fair bus priority)
             Bits 3-0 : Arbitration level (0-15 consecutive)

Offset 4 : General purpose register
             Bits 7-3 : User definable (here, 7,6 are SCSI ID)
             Bits 2-0 : reserved

Offset 10 : DMA decode register (used for I/O based DMA; can do PIO through this port)

Offset 12 : Status
             Bits 7-2 : reserved
             Bit    1 : DMA pending (1 = pending)
             Bit    0 : IRQ pending (0 = pending)

Iomega Host Cable Pinouts (original archived HERE)

SIGNAL    50-pin  50-pin  37-pin  25-pin  50-pin
NAME      Cntrncs Ribbon  D-Shell D-Shell SCSI2/HD

DB0          26       2      37       8       6
DBI          27       4      36      21       7
DB2          28       6      35      22       8
DB3          29       8      34      10       9
DB4          30      10      33      23      30
DB5          31      12      32      11      31
DB6          32      14      31      12      32
DB7          33      16      30      13      33
DBP(par)     34      18      29      20      34

ATN          41      32     N/C      17      41
BSY          43      36       8       6      43
ACK          44      38       7       5      44
RST/RES      45      40       6       4      45
MSG/MES      46      42       5       2      46
SEL          47      44       4      19      47
C/D          48      46       3      15      48
REQ          49      48       2       1      49
I/O          50      50       1       3      50

GND       1-11       *    11-28  7,9,14    1-12
GND       15-25,  20,22    10**   16,18,  14-25
GND       35,36,  30,34              24   35-37,
GND       40,42,                          39,40,42

RESERVED  12,14,  23,27
RESERVED  37,39

OPEN         13      25    9,10**            13

TRM PWR      38      26     N/C      25      38

Notes:

Cables with the same connectors on both ends are wired pin for pin. Cables with different connectors on its ends are wired according to the above chart.

* All ODD pins except 23, 25, 27.
** Pin 10 is open on PC2 Adapters, but is tied to ground on the PCI, PC3, and PC4 adapters.

Louis said (edited):
   Iomega was quite explicit, identifying Centronics, Ribbon, D-Shell but... 50-pin SCSI2/HD?

50-pin Cntrncs - Centronics C50
50-pin Ribbon - IDC-50
37-pin D-Shell - DB37
25-pin D-Shell - DB25 (like the MCS-600?)
50-pin SCSI2/HD - HPDB-50? Used on the PC4B-HD?

Content created and/or collected by:
Louis F. Ohland, Peter H. Wendt, David L. Beem, William R. Walsh, Tatsuo Sunagawa, Tomáš Slavotínek, Jim Shorney, Tim N. Clarke, Kevin Bowling, and many others.

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Last update: 24 Mar 2024 - Changelog | About | Legal & Contact