Processor Complex Benchmarks

Introduction
Hurricane98 Discover Utility - RAM Benchmarks
Hurricane98 Discover Utility - CPU Benchmarks


Introduction

Systems tested were a Model 95 with the 1S1P planar, 32 MB of parity SIMMs and a 9590 with 32 MB parity. No benchmarks depended on other installed options. Purely a CPU and RAM specific investigation. I did try the complexes in the 2S2P planar, but the differences were slight (under 5%, max).

What does this mean? In general, read Mb/sec increases proportionately with CPU speed for each given complex. However, write Mb/sec stays relatively unchanged with CPU speed for each given complex.

Note: This list is not complete.


Hurricane98 Discover Utility - RAM Benchmarks

CPU
16-bit Average
32-bit Average
SR
SW
RR
RW
SR
SW
RR
RW
G20
8.3
9.3
4.2
5.3
13
17
9.0
12
SK33
13
15
6.0
8.0
23
30
16
21
SKC33
14
15
6.0
8.0
27
30
18
21
SK66
22
15
12
9.7
36
30
25
23
SKC66
24
15
13
8.0
42
30
32
23
SK100
31
15
19
6.9
52
30
37
21
SKC100
35
15
20
6.8
59
30
45
21
UK33
13
14
6.0
8.0
23
29
16
21
UKC33
14
14
6.0
8.0
27
29
18
21
UK66
22
14
12
8.9
35
29
25
22
UKC66
24
14
13
9.0
42
29
32
22
UK100
31
14
20
6.6
51
29
36
20
UKC100
35
14
20
6.6
58
29
44
20
NK100
31
15
19
6.5
52
30
41
19
NKC100
34
15
20
6.8
58
30
50
19
NK133
38
15
20
3.5
61
30
44
18
NKC133
42
15
18
3.5
69
30
56
18
L50
16
15
9.0
10
28
30
20
25
L133
28
15
17
3.7
47
30
35
19
L75
24
15
14
7.7
40
30
29
20
M50
19
10
9.0
9.0
36
21
28
25
N83C256
33
19
29
8
57
40
62
23
P60
29
30
23
17
53
56
61
57
Y90
41
31
34
18
73
57
79
77
Y180
68
31
62
23
116
58
110
72

SR - Sequential Read
SW - Sequential Write
RR - Random Read
RW - Random Write

Results of 3.5 or so are probably due to the testing procedure, not the complex.


Hurricane98 Discover Utility - CPU Benchmarks

Complex
Sieve
100K Int Op/s
Dhrystone
K string Op/s
Modeswitch
M Mode Switches/s
Whetstone
K Whetstone Op/s
G20
28.7
12.2
4.2
0
SK33
48.1
20.5
7.2
4.2
SKC33
48.1
20.6
7.4
4.2
SK66
69.0
33.4
12.3
8.1
SKC66
69.1
33.6
12.4
8.1
SK100
73.0
39.6
14.2
11.4
SKC100
100.3
39.5
14.1
11.4
UK33
47.4
20.1
7.5
4.2
UKC33
47.2
20.0
7.4
4.1
UK66
66.7
32.6
12.0
7.9
UKC66
66.8
32.8
11.9
7.9
UK100
70.4
38.2
13.6
11.0
UKC100
70.3
38.4
13.6
11.1
NK100
99.3
38.9
11.0
11.3
NKC100
99.4
39.5
11.4
11.3
NK133
99.4
40.3
12.1
12.8
NKC133
99.4
40.2
12.1
12.8
L50
60.6
27.9
9.7
6.2
L75
70.3
36.2
12.4
9.0
L133
97.4
37.3
11.0
11.0
M50
66.0
25.3
8.5
6.1
N83C256
127.4
46.0
13.6
13.6
P60
145.6
67.1
18.5
13.6
Y90
218.1
101.8
23.3
20.4
Y180
437.3
200.7
36.2
40.9

G - 486SX-20, K - 486DX33, L - 486DX2-50, M - 486DX-50, P - (586)-60, Y - (586)-90 or 180
U - Upgrade (92F0145)
C - 256 KB cache
S - SOD
N - Non-SOD 64F0198
N83C256 - 9585-xNx w/ 83 MHz POD, 256 KB WB cache

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Louis F. Ohland, Peter H. Wendt, David L. Beem, William R. Walsh, Tatsuo Sunagawa, Tomáš Slavotínek, Jim Shorney, Tim N. Clarke, Kevin Bowling, and many others.

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