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Watchdog Circuit
Normal Operation
System Hung
Watchdog Circuit
The watchdog timer is used to detect a system problem, such as software in
an endless loop, with interrupts disabled. The watchdog works by checking that
the system timer 0 is being serviced regularly. If the watchdog detects that
IRQ0 is not being serviced quick enough (ie. lost timer ticks), the timer
overflow initiates a Non-Maskable Interrupt (NMI).
This timer only operates in Mode 0, and only has an 8-bit counter.
Normal Operation
Each trigger of IRQ 0 will initiate the interrupt 8 timer service routine.
At the completion of the timer service routine, the IRQ 0 line is cleared. This
same line is fed to timer 3's gate. Since no clock occurred from timer 0 while
timer 3's gate was active, timer 3 remains in the same state.
System Hung
IRQ 0 is not serviced and the IRQ 0 active line remains high. The next clock
from timer 0 output is allowed to clock timer 3 down. Once the pre-set count is
exhausted, timer 3's output goes high, causing an NMI. The BIOS NMI service
handler can then take appropriate action such as resetting the system.
The output of timer 3 can be read from port 92h and examining bit 4.
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